[Bug target/98596] registers not reused on RISC-V

[wilson at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98596

Jim Wilson <wilson at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2021-01-14
                 CC|                            |wilson at gcc dot gnu.org

--- Comment #1 from Jim Wilson <wilson at gcc dot gnu.org> ---
Part of the problem seems to be the use of volatile, as we disable
optimizations inside volatile operations, and both constants are used inside
volatile operations.

But a bigger issue seems to be how we calculate constant costs.  In
riscv_rtx_costs we have
          /* If the constant is likely to be stored in a GPR, SETs of           
             single-insn constants are as cheap as register sets; we            
             never want to CSE them.  */
          if (cost == 1 && outer_code == SET)
            *total = 0;
which tells the compiler that constants are cheaper than registers.  If I
change that to "*total = 1;" then the two constants get optimized.  Changing
this cost means we will likely extend register lifetimes and increase register
pressure, which may reduce performance in some applications.  We would need a
lot of tersting to see what happens.  We are already computing a cost of 0 for
constants in the arithmetic immediate range, so setting costs to 0 here seems
unnecessary, but it is hard to predict what might happen with this change. 
There might be something else I'm missing here.