[Bug target/98478] AVX512 refactoring integer mask with VnBImode

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98478

--- Comment #1 from Hongtao.liu <crazylht at gmail dot com> ---
according to sve-ieee-micro-2017.pdf predicate registers is 

Each predicate consists ofeight enable bits per 64-bit vector element, allowing
down to per byte-granularity. For any given element size only the
least significant bit is used as the enable. This is important
for vectorizing code containing multiple data types

predicates register are much more like vector mask in avx2, but not integer
mask in avx512.