[Bug rtl-optimization/93027] ICE: in match_reload, at lra-constraints.c:1060

[aoliva at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93027

Alexandre Oliva <aoliva at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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                 CC|                            |aoliva at gcc dot gnu.org

--- Comment #6 from Alexandre Oliva <aoliva at gcc dot gnu.org> ---
FWIW, with or without optimization, this testcase allocates inout f and in &w
to the same register in the .reload dump.  If the asm code used %0, expecting
it to be initially 0 as it should, it would fail:

int main (void) {
  int f = 0, w, z;

  asm volatile(
    "movl\t%0, %1"
    : "+m&l"(f), "=g" (z)
    : "0a"(&w)
  );

  if (z)
    __builtin_abort ();

  return 0;
}