[Bug target/100236] arm: UB in arm_compute_save_core_reg_mask (shift exponent 4294967295 is too large for 32-bit type 'int')

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100236

--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by Richard Earnshaw
<rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:100cc845cda3843e87f152f845b11b70fee3d7bc

commit r11-8315-g100cc845cda3843e87f152f845b11b70fee3d7bc
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Tue Apr 27 12:25:30 2021 +0100

    arm: fix UB when compiling thumb2 with PIC [PR100236]

    arm_compute_save_core_reg_mask contains UB in that the saved PIC
    register number is used to create a bit mask. However, for some target
    options this register is undefined and we end up with a shift of ~0.

    On native compilations this is benign since the shift will still be
    large enough to move the bit outside of the range of the mask, but if
    cross compiling from a system that truncates out-of-range shifts to
    zero (or worse, raises a trap for such values) we'll get potentially
    wrong code (or a fault).

    gcc:
            PR target/100236
            * config/arm/arm.c (THUMB2_WORK_REGS): Check
PIC_OFFSET_TABLE_REGNUM
            is valid before including it in the mask.
    (cherry picked from commit 01d0bda8bdf3cd804e1e00915d432ad0cdc49399)