[Bug tree-optimization/97359] [11 Regression] ice in logical_combine, at gimple-range-gori.cc:754

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97359

--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Aldy Hernandez <aldyh@gcc.gnu.org>:

https://gcc.gnu.org/g:14db1dfcd18e4d2712a043bdcd3976fcfb0642c2

commit r11-3762-g14db1dfcd18e4d2712a043bdcd3976fcfb0642c2
Author: Aldy Hernandez <aldyh@redhat.com>
Date:   Sat Oct 10 08:28:52 2020 +0200

    PR97359: Do not cache relops in GORI cache.

    logical_stmt_cache::cacheable_p() returns true for relops, but
    logical_combine (which does the caching) doesn't handle them and ICEs.
    This patch fixes the inconsistency by returning false for relops.

    This was working before because even though logical_combine doesn't
    handle relops, statements with only one SSA are handled in cache_stmt,
    which seems like the only statement we've ever encountered (even through
    a full Fedora build).

            lhs = s_5 > 999;

    However, with two SSA operands we ICE because logical_combine doesn't
    handle them:

            lhs = s_5 > y_8;

    We can either return false for relops in cacheable_p, or fix
    logical_combine to handle them.  The original idea was to only cache
    ANDs and ORs, so I've done the former to unbreak trunk.

    We can decide later if there was ever any benefit in caching relops.

    gcc/ChangeLog:

            PR tree-optimization/97359
            * gimple-range-gori.cc (logical_stmt_cache::cacheable_p): Only
            handle ANDs and ORs.
            (gori_compute_cache::cache_stmt): Adjust comment.

    gcc/testsuite/ChangeLog:

            * gcc.dg/pr97359.c: New test.