[Bug target/97286] GCC sometimes uses an extra xmm register for the destination of _mm_blend_ps
jakub at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Mon Oct 5 10:08:37 GMT 2020
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97286
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |jakub at gcc dot gnu.org,
| |vmakarov at gcc dot gnu.org
--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
We have:
(insn 17 15 19 4 (set (reg:V4SF 92)
(vec_merge:V4SF (mem:V4SF (plus:DI (reg/v/f:DI 88 [ in ])
(reg:DI 87 [ ivtmp.15 ])) [0 MEM[(const __m128i_u *
{ref-all})in_7(D) + ivtmp.15_30 * 1]+0 S16 A8])
(subreg:V4SF (reg/v:V2DI 91 [ a ]) 0)
(const_int 5 [0x5]))) "include/smmintrin.h":193:19 4587
{sse4_1_blendps}
(expr_list:REG_DEAD (reg/v:V2DI 91 [ a ])
(nil)))
(insn 19 17 20 4 (set (reg/v:V2DI 91 [ a ])
(subreg:V2DI (reg:V4SF 92) 0)) "pr97286.c":5:11 1405 {movv2di_internal}
(nil))
in the loop (plus pseudo 91 setter before the loop and pseudo 92 store in the
loop).
There are no conflicts:
;; a4(r91,l0) conflicts: a15(r92,l0)
;; total conflict hard regs:
;; conflict hard regs:
so it is unclear why IRA doesn't prefer putting it into the same register.
Maybe the subregs are the reason and if there weren't any, it would do it?
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