[Bug target/97939] ICE on sparc64 with UBsan for "i + 4096" on long: unrecognizable insn during RTL pass: vregs
ebotcazou at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Fri Nov 27 09:08:23 GMT 2020
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97939
--- Comment #6 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
> Not sure how useful this is but all of the following toss the same ICE :
>
> long f(long arg){return arg + 4096;}
>
> long f(long arg){return arg - 4096;}
>
> long f(long arg){return 4096 + arg;}
>
> long f(long arg){return arg - 4096;}
>
> However these work fine :
>
> long f(long arg){return 4096 - arg;}
>
> long f(long arg){return arg * 4096;}
>
> long f(long arg){return 4096 * arg;}
>
> long f(long arg){return arg / 4096;}
>
> etc etc etc as well as other powers of 2.
It's specific to 4096 and additive operations. A look at the assembly
generated for the first 4 without -fsanitize=undefined may give a hunch about
what happens.
More information about the Gcc-bugs
mailing list