[Bug target/97715] [11 Regression] ICE in insn_default_length, at config/i386/i386.md:15325 since r11-4578-gd10f3e900b0377b4

[qing.zhao at oracle dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97715

--- Comment #20 from Qing Zhao <qing.zhao at oracle dot com> ---
> On Nov 4, 2020, at 11:48 AM, jakub at gcc dot gnu.org <gcc-bugzilla@gcc.gnu.org> wrote:
> 
> --- Comment #18 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
> --- gcc/function.c.jj   2020-10-31 17:41:19.756740009 +0100
> +++ gcc/function.c      2020-11-04 17:56:53.790403571 +0100
> @@ -5871,6 +5871,8 @@ gen_call_used_regs_seq (rtx_insn *ret, u
>        continue;
>       if (fixed_regs[regno])
>        continue;
> +      if (!TEST_HARD_REG_BIT (accessible_reg_set, regno))
> +       continue;
>       if (REGNO_REG_SET_P (live_out, regno))
>        continue;
>       if (only_gpr
> --- gcc/testsuite/gcc.target/i386/zero-scratch-regs-32.c.jj     2020-11-04
> 17:59:19.063795531 +0100
> +++ gcc/testsuite/gcc.target/i386/zero-scratch-regs-32.c        2020-11-04
> 17:59:01.956984879 +0100
> @@ -0,0 +1,5 @@
> +/* PR target/97715 */
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -fzero-call-used-regs=all -mno-80387" } */
> +
> +#include "../../c-c++-common/zero-scratch-regs-10.c"
> 
> isn't enough though, because while the st to st(7) registers are inaccessible
> with -mno-80387, the MMX registers are accessible, so I think the
> zero_all_st_registers change is needed too.

Yeh, I noticed the same issue too.
I will add the fix you proposed previously.