[Bug target/95285] AArch64:aarch64 medium code model proposal

[bule1 at huawei dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95285

--- Comment #11 from Bu Le <bule1 at huawei dot com> ---

> You're right, we need an extra add, so it's like this:
> 
> adrp    x0, bar1.2782
> movk 	x1, :high32_47:bar1.2782
> add     x0, x0, x1
> add     x0, x0, :lo12:bar1.2782
> 
> > (By the way, the high32_47 relocation you suggested is the prel_g2 in the
> > officail aarch64 ABI released)
> 
> It needs a new relocation because of the ADRP. ADR could be used so the
> existing R_<CLS>_MOVW_PREL_G0-3 work, but then you need 5 instructions.

So you suggest a new relocation type "high32_47" to calculate the offset
between ADRP and bar1. Am I right?

> > And in terms of engineering, you idea can save the trouble to modify the
> > linker for calculating the offset for 3 movks. But we still need to make a
> > new relocation type for ADRP, because it currently checking the overflow of
> > address and gives the "relocation truncated to fit" error. Therefore, both
> > idea need to do works in binutils, which make it also equivalent.
> 
> There is relocation 276 (R_<CLS>_ADR_PREL_PG_HI21_NC).

Yes, through, we still need to make a change to compiler so when it comes to
medium code model, ADRP can use R_<CLS>_ADR_PREL_PG_HI21_NC relocation.