[Bug target/82261] x86: missing peephole for SHLD / SHRD

ubizjak at gmail dot com gcc-bugzilla@gcc.gnu.org
Tue May 19 10:45:56 GMT 2020


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82261

--- Comment #3 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Michael Clark from comment #2)
> Just refreshing this issue. I found it while testing some code-gen on
> Godbolt:

The combiner creates:

Failed to match this instruction:
(parallel [
        (set (reg:SI 89)
            (ior:SI (ashift:SI (reg:SI 94)
                    (subreg:QI (reg/v:SI 88 [ n ]) 0))
                (lshiftrt:SI (reg:SI 95)
                    (minus:QI (subreg:QI (reg:SI 91) 0)
                        (subreg:QI (reg/v:SI 88 [ n ]) 0)))))
        (clobber (reg:CC 17 flags))
    ])

This is *almost* matched by:

(define_insn "x86_shld"
  [(set (match_operand:SI 0 "nonimmediate_operand" "+r*m")
        (ior:SI (ashift:SI (match_dup 0)
                  (match_operand:QI 2 "nonmemory_operand" "Ic"))
                (lshiftrt:SI (match_operand:SI 1 "register_operand" "r")
                  (minus:QI (const_int 32) (match_dup 2)))))
   (clobber (reg:CC FLAGS_REG))]

but RTL combiner doesn't propagate (const_int 32) into the pattern.

I wonder if tree combiner can help here.


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