[Bug tree-optimization/83403] Missed register promotion opportunities in loop

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83403

--- Comment #8 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Xiong Hu Luo <luoxhu@gcc.gnu.org>:

https://gcc.gnu.org/g:0447929f11e6a3e1b076841712b90a8b6bc7d33a

commit r11-259-g0447929f11e6a3e1b076841712b90a8b6bc7d33a
Author: Xionghu Luo <luoxhu@linux.ibm.com>
Date:   Sun May 10 21:06:20 2020 -0500

    Add handling of MULT_EXPR/PLUS_EXPR for wrapping overflow in affine
combination(PR83403)

    Use determine_value_range to get value range info for fold convert
expressions
    with internal operation PLUS_EXPR/MINUS_EXPR/MULT_EXPR when not overflow on
    wrapping overflow inner type.  i.e.:

    (long unsigned int)((unsigned int)n * 10 + 1)
    =>
    (long unsigned int)n * (long unsigned int)10 + (long unsigned int)1

    With this patch for affine combination, load/store motion could detect
    more address refs independency and promote some memory expressions to
    registers within loop.

    PS: Replace the previous "(T1)(X + CST) as (T1)X - (T1)(-CST))"
    to "(T1)(X + CST) as (T1)X + (T1)(CST))" for wrapping overflow.

    Bootstrap and regression tested pass on Power8-LE.

    gcc/ChangeLog

            2020-05-11  Xiong Hu Luo  <luoxhu@linux.ibm.com>

            PR tree-optimization/83403
            * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
            determine_value_range, Add fold conversion of MULT_EXPR, fix the
            previous PLUS_EXPR.

    gcc/testsuite/ChangeLog

            2020-05-11  Xiong Hu Luo  <luoxhu@linux.ibm.com>

            PR tree-optimization/83403
            * gcc.dg/tree-ssa/pr83403-1.c: New test.
            * gcc.dg/tree-ssa/pr83403-2.c: New test.
            * gcc.dg/tree-ssa/pr83403.h: New header.