[Bug target/94019] [9 regression] gcc.dg/vect/vect-over-widen-17.c fails starting with g:370c2ebe8fa20e0812cd2d533d4ed38ee2d37c85, r9-1590

[linkw at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94019

Kewen Lin <linkw at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |ASSIGNED
   Last reconfirmed|                            |2020-03-04
                 CC|                            |linkw at gcc dot gnu.org
           Assignee|unassigned at gcc dot gnu.org      |linkw at gcc dot gnu.org
     Ever confirmed|0                           |1

--- Comment #1 from Kewen Lin <linkw at gcc dot gnu.org> ---
It's a power7 specific test case issue, the failure is due to the below
statement existence:
  __vector signed char vect__4.25;

Without misaligned vector access support, it has to use realign_load which
requires one vector char based control vector.

  vect__4.22_82 = MEM <vector(8) short unsigned int> [(short unsigned int
*)vectp_b.24_81];
  vect__4.25_83 = __builtin_altivec_mask_for_load (vectp_b.24_79);
 ...
  vect__4.29_91 = MEM <vector(8) short unsigned int> [(short unsigned int
*)vectp_b.27_90];
  vect__4.30_92 = REALIGN_LOAD <vect__4.26_84, vect__4.29_91, vect__4.25_83>;

The fix can be to guard the check under misaligned vector access support.

--- a/gcc/testsuite/gcc.dg/vect/vect-over-widen-17.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-over-widen-17.c
@@ -41,6 +41,6 @@ main (void)
 }

 /* { dg-final { scan-tree-dump-not {vect_recog_over_widening_pattern:
detected} "vect" } } */
-/* { dg-final { scan-tree-dump-not {vector[^\n]*char} "vect" } } */
+/* { dg-final { scan-tree-dump-not {vector[^\n]*char} "vect" { target
vect_hw_misalign } } } */
 /* { dg-final { scan-tree-dump-not {vector[^ ]* int} "vect" } } */
 /* { dg-final { scan-tree-dump-times "vectorized 1 loop" 1 "vect" } } */