[Bug target/95750] [x86] Use dummy atomic insn instead of mfence in __atomic_thread_fence(seq_cst)

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95750

--- Comment #4 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Uroš Bizjak from comment #3)
> How about the following patch:

Surely, mfence_nosse needs to be enabled also for
TARGET_USE_XCHG_FOR_ATOMIC_STORE.

> This will generate "lock orl $0, (%rsp)" instead of mfence.

Please also read [1] why we avoid -4(%%esp).

[1] https://gcc.gnu.org/pipermail/gcc-patches/2017-February/469630.html