[Bug rtl-optimization/91333] [9/10 Regression] suboptimal register allocation for inline asm

[clyon at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91333

Christophe Lyon <clyon at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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                 CC|                            |clyon at gcc dot gnu.org

--- Comment #10 from Christophe Lyon <clyon at gcc dot gnu.org> ---
(In reply to Jeffrey A. Law from comment #9)
> Fixed by Vlad's patch on the trunk.

This patch causes regressions:
aarch64:
gcc.target/aarch64/sve/pcs/args_10.c -march=armv8.2-a+sve  scan-assembler
\\tld4w\\t{z2\\.s - z5\\.s}, p[0-7]/z, \\[x0\\]\\n
gcc.target/aarch64/sve/pcs/args_5_be_bf16.c -march=armv8.2-a+sve 
check-function-bodies callee
gcc.target/aarch64/sve/pcs/args_5_be_bf16.c -march=armv8.2-a+sve 
scan-assembler \\tld4h\\t{z0\\.h - z3\\.h}, p[0-7]/z, \\[x0, #-8, mul vl\\]\\n
gcc.target/aarch64/sve/pcs/args_5_be_f16.c -march=armv8.2-a+sve 
check-function-bodies callee
gcc.target/aarch64/sve/pcs/args_5_be_f16.c -march=armv8.2-a+sve  scan-assembler
\\tld4h\\t{z0\\.h - z3\\.h}, p[0-7]/z, \\[x0, #-8, mul vl\\]\\n
gcc.target/aarch64/sve/pcs/args_5_be_f32.c -march=armv8.2-a+sve 
check-function-bodies callee
gcc.target/aarch64/sve/pcs/args_5_be_f32.c -march=armv8.2-a+sve  scan-assembler
\\tld4w\\t{z0\\.s - z3\\.s}, p[0-7]/z, \\[x0, #-8, mul vl\\]\\n
gcc.target/aarch64/sve/pcs/args_5_be_f64.c -march=armv8.2-a+sve 
check-function-bodies callee
[....] and many others


on arm:
gcc.target/arm/armv8_2-fp16-move-2.c scan-assembler bmi