[Bug target/97417] RISC-V Unnecessary andi instruction when loading volatile bool

admin at levyhsu dot com gcc-bugzilla@gcc.gnu.org
Mon Dec 14 10:43:51 GMT 2020


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97417

--- Comment #48 from Levy <admin at levyhsu dot com> ---
Created attachment 49757
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=49757&action=edit
Initial V1 patch on combine.c

Three patches together: 


               ========= Summary of gcc testsuite =========
                            | # of unexpected case / # of unique unexpected
case
                            |          gcc |          g++ |     gfortran |
 rv64imafdc/  lp64d/ medlow |    0 /     0 |    0 /     0 |      - |

I'll merge all 3 patches together and fix all the debug/coding style/efficiency
/whatever problem with explanations later this week.

Looks likes it's fixed from my side.


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