[Bug tree-optimization/94574] New: aarch64: ICE during GIMPLE pass:ccp

[yangyang305 at huawei dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94574

            Bug ID: 94574
           Summary: aarch64: ICE during GIMPLE pass:ccp
           Product: gcc
           Version: 10.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: tree-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: yangyang305 at huawei dot com
  Target Milestone: ---

Hi， gcc-10 ICEs when compiling the following testcase with -O2
-msve-vector-bits=256 -march=armv8.2-a+sve

test case: gcc/testsuite/gcc.target/aarch64/sve/acle/general/deref_1.c
---
/* { dg-options "-O2" } */

#include <arm_sve.h>

uint64_t
f1 (int32_t *x, int32_t *y)
{
  union { uint64_t x; char c[8]; } u;
  svbool_t pg = svptrue_b32 ();
  *(svbool_t *)&u.c[0] = svcmpeq (pg, svld1 (pg, x), 0);
  *(svbool_t *)&u.c[4] = svcmpeq (pg, svld1 (pg, y), 1);
  return u.x;
}

typedef unsigned int v4si __attribute__((vector_size(16)));

/* The aliasing is somewhat dubious here, but it must compile.  */

v4si
f2 (void)
{
  v4si res;
  *(svuint32_t *) &res = svindex_u32 (0, 1);
  return res;
}
---
GCC version: 10.0.1 20200413 (experimental)

Result:
deref_1.c: In function ‘f2’:
deref_1.c:25:1: error: not allowed type combination in ‘bit_insert_expr’
   25 | }
      | ^
v4si
vector(8) unsigned int
res_9 = BIT_INSERT_EXPR <res_8(D), _7, 0>;
during GIMPLE pass: ccp
deref_1.c:25:1: internal compiler error: verify_gimple failed
0xcfc9b7 verify_gimple_in_cfg(function*, bool)
        ../.././gcc/tree-cfg.c:5462
0xbc534b execute_function_todo
        ../.././gcc/passes.c:1985
0xbc622b do_per_function
        ../.././gcc/passes.c:1640
0xbc622b execute_todo
        ../.././gcc/passes.c:2039
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