[Bug debug/94502] [aarch64] Missing LR register location in FDE

[luis.machado at linaro dot org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94502

--- Comment #3 from Luis Machado <luis.machado at linaro dot org> ---
Here's a DWARF and asm dump from the same binary:

000000d0 000000000000001c 00000000 FDE cie=00000000
pc=00000000000007f4..0000000000000830
DW_CFA_advance_loc: 4 to 00000000000007f8
DW_CFA_def_cfa_offset: 32
DW_CFA_advance_loc: 52 to 000000000000082c
DW_CFA_def_cfa_offset: 0
DW_CFA_nop
DW_CFA_nop

00000000000007f4 <not_inline_func1>:
7f4:   d10083ff        sub     sp, sp, #0x20
7f8:   b9000fe0        str     w0, [sp, #12]
7fc:   52800040        mov     w0, #0x2                        // #2
800:   b90017e0        str     w0, [sp, #20]
804:   b9400fe0        ldr     w0, [sp, #12]
808:   b9001be0        str     w0, [sp, #24]
80c:   52800020        mov     w0, #0x1                        // #1
810:   b9001fe0        str     w0, [sp, #28]
814:   b9401be1        ldr     w1, [sp, #24]
818:   b9401fe0        ldr     w0, [sp, #28]
81c:   0b000021        add     w1, w1, w0
820:   b94017e0        ldr     w0, [sp, #20]
824:   0b000020        add     w0, w1, w0
828:   910083ff        add     sp, sp, #0x20
82c:   d65f03c0        ret

Sources:

static inline ATTR int
inline_func1 (int x)
{
  int y = 1;                    /* inline_func1  */

  return y + x;
}

static int
not_inline_func1 (int x)
{
  int y = 2;                    /* not_inline_func1  */

  return y + inline_func1 (x);
}

--

The lack of a rule for LR means GDB will assume the register is UNSPECIFIED. Is
GCC assuming this register is considered to have the same value as an inner
frame?