[Bug target/94488] [AArch64] ICE on right shift of V2DImode by DImode shift

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94488

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Assignee|unassigned at gcc dot gnu.org      |jakub at gcc dot gnu.org
             Status|NEW                         |ASSIGNED

--- Comment #4 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Created attachment 48207
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=48207&action=edit
gcc10-pr94488.patch

Seems this bug goes all the way to the introduction of aarch64 port.
The patterns have general_operand predicate on the shift amount, but actually
only grok if the amount is a CONST_INT, or REG or MEM and nothing else, while
in this case it is a SUBREG of REG.  There is no reason why it can't handle any
general_operand.