[Bug bootstrap/91834] [AArch64] LSE atomics, ILP32 warnings

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91834

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
>I presume the warning itself is not bogus.
The warning is correct.   According to the ARM ARM.

This patch should fix the issue but it is untested:
diff --git a/libgcc/config/aarch64/lse.S b/libgcc/config/aarch64/lse.S
index a5f6673596c..c7979382ad7 100644
--- a/libgcc/config/aarch64/lse.S
+++ b/libgcc/config/aarch64/lse.S
@@ -227,8 +227,8 @@ STARTFN     NAME(LDNM)
 8:     mov             s(tmp0), s(0)
 0:     LDXR            s(0), [x1]
        OP              s(tmp1), s(0), s(tmp0)
-       STXR            w(tmp1), s(tmp1), [x1]
-       cbnz            w(tmp1), 0b
+       STXR            w(tmp2), s(tmp1), [x1]
+       cbnz            w(tmp2), 0b
        ret

 ENDFN  NAME(LDNM)


Thanks,
Andrew Pinski