[Bug target/92038] Extremely inefficient x86_64 code for trivally copyable types passed in registers.

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92038

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |missed-optimization
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2019-10-10
                 CC|                            |jakub at gcc dot gnu.org,
                   |                            |rguenth at gcc dot gnu.org
     Ever confirmed|0                           |1

--- Comment #3 from Richard Biener <rguenth at gcc dot gnu.org> ---
The issue is that we initialize the aggregate without initializing the
tail-padding but the ABI says we pass in a 64bit reg which means we load from
the uninitialized padding.  RTL opts cannot deal with the partial/piecewise
inits
to elide the local aggregate.

It's not that we don't care but this one is not so easy to fix.

With liveness analysis and some heuristics store-merging could be made to
also initialize the padding.