[Bug target/92602] Failure in gcc.target/powerpc/bswap64-2.c

[segher at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92602

--- Comment #6 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Author: segher
Date: Thu Nov 28 22:28:59 2019
New Revision: 278821

URL: https://gcc.gnu.org/viewcvs?rev=278821&root=gcc&view=rev
Log:
rs6000: Use memory_operand for all simple {l,st}*brx instructions

We run fwprop before combine, very early even in the case of fwprop1;
and fwprop1 will change memory addressing to what it considers cheaper.
After the "common" change, it now changes the indexed store instruction
in the testcase to be to a constant address.  But that is not an
improvement at all: the byte reverse instructions only exist in the
indexed form, so they will not match anymore.

This patch changes the patterns for the byte reverse instructions to
allow plain memory_operand, letting reload fix this up.


        PR target/92602
        * config/rs6000/rs6000.md (bswap<mode>2_load for HSI): Change the
        indexed_or_indirect_operand to be memory_operand.
        (bswap<mode>2_store for HSI): Ditto.
        (bswapdi2_load): Ditto.
        (bswapdi2_store): Ditto.

Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/rs6000/rs6000.md