[Bug rtl-optimization/89865] [9 Regression] FAIL: gcc.target/i386/pr49095.c scan-assembler-times \\\\), % 45

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89865

--- Comment #18 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
The test adjustment so that it only checks what the PR85683 change really meant
to check for would be:
2019-03-29  Jakub Jelinek  <jakub@redhat.com>

        PR rtl-optimization/89865
        * gcc.target/i386/pr49095.c: Include in scan-assembler-times patterns
        the first argument register, so that occassional spills/fills are
        ignored.

--- gcc/testsuite/gcc.target/i386/pr49095.c.jj  2018-10-08 15:18:22.074105125
+0200
+++ gcc/testsuite/gcc.target/i386/pr49095.c     2019-03-29 13:11:54.941597147
+0100
@@ -73,5 +73,5 @@ G (long)
 /* { dg-final { scan-assembler-not "test\[lq\]" } } */
 /* The {f,h}{char,short,int,long}xor functions aren't optimized into
    a RMW instruction, so need load, modify and store.  FIXME eventually.  */
-/* { dg-final { scan-assembler-times "\\), %" 57 { target { ia32 } } } } */
-/* { dg-final { scan-assembler-times "\\), %" 45 { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "\\(%eax\\), %" 12 { target { ia32 } } }
} */
+/* { dg-final { scan-assembler-times "\\(%\[re\]di\\), %" 8 { target { ! ia32
} } } } */

Now, for ia32 we've regressed even there, as we emit those 8 RMWs for
{f,h}{char,short,int,long}xor,
like for m64, but also 4 RMWs for f{char,short,int,long}minus.
Will look at thos next.