[Bug target/89803] Missing AVX512 intrinsics
crazylht at gmail dot com
gcc-bugzilla@gcc.gnu.org
Mon Jun 3 10:43:00 GMT 2019
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89803
--- Comment #6 from Hongtao.liu <crazylht at gmail dot com> ---
Using "vector_operand" "vm" instead
Index: gcc/config/i386/sse.md
===================================================================
--- gcc/config/i386/sse.md (revision 271853)
+++ gcc/config/i386/sse.md (working copy)
@@ -600,6 +600,10 @@
(V8HI "v8si") (V16HI "v16si") (V32HI "v32si")
(V4SI "v4di") (V8SI "v8di") (V16SI "v16di")])
+(define_mode_attr mem_suffix
+ [(V16SF "{z}") (V8SF "{y}") (V4SF "{x}")
+ (V8DF "{z}") (V4DF "{y}") (V2DF "{x}")])
+
(define_mode_attr ssedoublemode
[(V4SF "V8SF") (V8SF "V16SF") (V16SF "V32SF")
(V2DF "V4DF") (V4DF "V8DF") (V8DF "V16DF")
@@ -21317,26 +21321,26 @@
(define_insn "avx512dq_fpclass<mode><mask_scalar_merge_name>"
[(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
(unspec:<avx512fmaskmode>
- [(match_operand:VF_AVX512VL 1 "register_operand" "v")
+ [(match_operand:VF_AVX512VL 1 "vector_operand" "vm")
(match_operand:QI 2 "const_0_to_255_operand" "n")]
UNSPEC_FPCLASS))]
"TARGET_AVX512DQ"
- "vfpclass<ssemodesuffix>\t{%2, %1,
%0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2}";
+ "vfpclass<ssemodesuffix><mem_suffix>\t{%2, %1,
%0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2}";
[(set_attr "type" "sse")
(set_attr "length_immediate" "1")
(set_attr "prefix" "evex")
(set_attr "mode" "<MODE>")])
also need to modify scan assembler tests.
More information about the Gcc-bugs
mailing list