[Bug target/89482] arm aarch32 inline assembly w constraints generate s registers instead of d

[ciro.santilli at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89482

--- Comment #8 from Ciro Santilli <ciro.santilli at gmail dot com> ---
Thanks for the reply, David.

Do you have the doc patch uploaded anywhere to serve as a starting point?

Quick things that we might need to change / clarify:

- is the x constraint documented somewhere? Mentioned at `b     Use with "w" or
"x" constraint to print the register's 8bit B name.`
- also document the aarch32 modifiers, e.g. %P from this thread
- in
https://www.limegreensocks.com/arm/Machine-Constraints.html#Machine-Constraints
"ARM family" why do we have both 't' and 'w', since as per this thread s0 and
d0 are differentiated with a %P modifier?

I don't know GCC internals, but I know enough ARM assembly to experimentally
verify those very quickly and guess from the relevant source point if not too
convoluted, does not look too bad:

- ARM:
https://github.com/gcc-mirror/gcc/blob/gcc-8_2_0-release/gcc/config/arm/arm.c#L22466
- aarch64:
https://github.com/gcc-mirror/gcc/blob/gcc-8_2_0-release/gcc/config/aarch64/aarch64.c#L6743