[Bug target/91528] [10 Regression] ICE in ix86_expand_prologue at i386.c:7844 since r274481
ubizjak at gmail dot com
gcc-bugzilla@gcc.gnu.org
Tue Aug 27 06:04:00 GMT 2019
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91528
--- Comment #7 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to H.J. Lu from comment #6)
> (In reply to Uroš Bizjak from comment #3)
> > (In reply to Richard Biener from comment #1)
> >
> > HJ, can you please take the patch from here? Realignment stuff is a bit of
> > mistery to me.
>
> I prefer this patch:
>
> https://gcc.gnu.org/ml/gcc-patches/2016-01/msg02127.html
I don't think the patch is correct. For SImode STV, we need 128bit stack
alignment, since RA can decompose (SUBREG:V4SI (REG:SI)) to SImode spill and
V4SImode fill from the stack, so the assumption in your patch:
/* Don't do dynamic stack realignment for long long objects with
-mpreferred-stack-boundary=2. The STV pass uses SSE2 instructions
on DImode which needs 64-bit alignment for DImode. */
IMO does not reflect (new) reality.
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