[Bug target/90346] gcc generates the "lfence" instruction on CPUs that don't support it

[mikulas at artax dot karlin.mff.cuni.cz]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90346

--- Comment #5 from mikulas at artax dot karlin.mff.cuni.cz ---
On non-SSE2 CPUs, it should generate "lock; addl $0,(%esp)" That provides
barrier equivalent to "mfence"