[Bug target/88834] [SVE] Poor addressing mode choices for LD2 and ST2

[wilco at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88834

--- Comment #16 from Wilco <wilco at gcc dot gnu.org> ---
(In reply to kugan from comment #15)
> (In reply to Wilco from comment #11)
> > There is also something odd with the way the loop iterates, this doesn't
> > look right:
> > 
> >         whilelo p0.s, x3, x4
> >         incw    x3
> >         ptest   p1, p0.b
> >         bne     .L3
> 
> I am not sure I understand this. I tried with qemu using an execution
> testcase and It seems to work.
> 
>         whilelo	p0.s, x4, x5
> 	incw	x4
> 	ptest	p1, p0.b
> 	bne	.L3
> In my case I have the above (register allocation difference only) incw is
> correct considering two vector word registers? Am I missing something here?

I'm talking about the completely redundant ptest, where does that come from?