[Bug target/88224] New: Wrong Cortex-R7 and Cortex-R8 FPU configuration

[avieira at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88224

            Bug ID: 88224
           Summary: Wrong Cortex-R7 and Cortex-R8 FPU configuration
           Product: gcc
           Version: 8.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: avieira at gcc dot gnu.org
  Target Milestone: ---

The Cortex-R7 and Cortex-R8 TRM's* indicate that both CPUs can be configured
with one of the following FPU options:
1) No FPU
2) Single precision-only VFPv3, with 16 double-precision registers and with
FP16 conversion instructions extension
3) Single and double-precision VFPv3, with 16 double-precision registers and
with FP16 conversion instructions extension.

Currently GCC configures R7 and R8 without FP16 conversion instructions when
using -mcpu=cortex-r7/cortex-r8 and it does not offer the single-precision only
configuration (i.e. no +npfp.dp)


*) https://static.docs.arm.com/ddi0458/c/DDI0458C_cortex_r7_r0p1_trm.pdf
https://static.docs.arm.com/100400/0001/arm_cortexr8_mpcore_processor_trm_100400_0001_03_en.pdf