[Bug target/84514] powerpc sub optimal condition register reuse with extended inline asm

[segher at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84514

Segher Boessenkool <segher at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Target|powerpc-*-*                 |powerpc*-*-*

--- Comment #1 from Segher Boessenkool <segher at gcc dot gnu.org> ---
If you do not use a volatile asm (it has no outputs so it is always volatile),
you get:

(replace the asm with
  long dum;
  asm("#asm input register %0" : "=r"(dum) : "r"(lr));
):

        cmpdi 7,3,5
        bnelr 7
        addis 8,2,.LC0@toc@ha
        ld 8,.LC0@toc@l(8)
        addis 9,2,.LC1@toc@ha
        ld 9,.LC1@toc@l(9)
#APP
 # 7 "84514.c" 1
        mflr 7
 # 0 "" 2
 # 16 "84514.c" 1
        mfctr 10
 # 0 "" 2
#NO_APP
        std 7,0(8)
        std 10,0(9)
        blr

so everything is fine then.  The difference already happens at tree level,
many things do not know how to optimise in the presence of volatile asm.