[Bug target/84790] Miscompilation for MIPS16 with -fpic and -Os or -O2

[mschiffer@universe-factory.net]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790

--- Comment #2 from Matthias Schiffer <mschiffer@universe-factory.net> ---
The problem seems to be that the gp init sequence

        li      $2,%hi(_gp_disp)
        addiu   $3,$pc,%lo(_gp_disp)
        sll     $2,16
        addu    $2,$3

is generated very late and does not appear in the RTL in any way, so optimizing
passes are not aware of the $3 (and possibly $2?) clobber. I don't know enough
about GCC internals for further analysis.