[Bug rtl-optimization/86334] wrong code with -march=athlon -mmemcpy-strategy=libcall:-1:noalign
ubizjak at gmail dot com
gcc-bugzilla@gcc.gnu.org
Thu Jun 28 19:51:00 GMT 2018
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86334
Uroš Bizjak <ubizjak at gmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Last reconfirmed| |2018-06-28
CC| |ebotcazou at gcc dot gnu.org
Component|target |rtl-optimization
Ever confirmed|0 |1
--- Comment #1 from Uroš Bizjak <ubizjak at gmail dot com> ---
Confirmed.
For some reason, DSE pass is removing (insn 8) and (insn 9) from the following
sequence:
(insn 5 2 6 2 (parallel [
(set (reg/f:SI 102)
(plus:SI (reg/f:SI 20 frame)
(const_int -128 [0xffffffffffffff80])))
(clobber (reg:CC 17 flags))
]) 231 {*addsi_1}
(expr_list:REG_UNUSED (reg:CC 17 flags)
(nil)))
(insn 6 5 7 2 (set (reg:SI 103)
(const_int 0 [0])) 86 {*movsi_internal}
(nil))
(insn 7 6 8 2 (set (reg:SI 104)
(const_int 16 [0x10])) 86 {*movsi_internal}
(nil))
(insn 8 7 9 2 (parallel [
(set (reg:SI 104)
(const_int 0 [0]))
(set (reg/f:SI 102)
(plus:SI (ashift:SI (reg:SI 104)
(const_int 2 [0x2]))
(reg/f:SI 102)))
(set (mem/c:BLK (reg/f:SI 102) [1 g+0 S64 A512])
(const_int 0 [0]))
(use (reg:SI 103))
(use (reg:SI 104))
]) 1008 {*rep_stossi}
(expr_list:REG_DEAD (reg:SI 103)
(expr_list:REG_UNUSED (reg:SI 104)
(expr_list:REG_UNUSED (reg/f:SI 102)
(nil)))))
(insn 9 8 12 2 (set (mem/j/c:SI (plus:SI (reg/f:SI 20 frame)
(const_int -128 [0xffffffffffffff80])) [1 g+0 S4 A512])
(const_int 4 [0x4])) "pr86334.c":6 86 {*movsi_internal}
(nil))
(insn 12 9 13 2 (parallel [
(set (reg/f:SI 107)
(plus:SI (reg/f:SI 20 frame)
(const_int -64 [0xffffffffffffffc0])))
(clobber (reg:CC 17 flags))
]) "pr86334.c":7 231 {*addsi_1}
(expr_list:REG_UNUSED (reg:CC 17 flags)
(nil)))
(insn 13 12 15 2 (parallel [
(set (reg/f:SI 108)
(plus:SI (reg/f:SI 20 frame)
(const_int -128 [0xffffffffffffff80])))
(clobber (reg:CC 17 flags))
]) "pr86334.c":7 231 {*addsi_1}
(expr_list:REG_UNUSED (reg:CC 17 flags)
(nil)))
(insn 15 13 16 2 (set (mem:SI (plus:SI (reg/f:SI 7 sp)
(const_int 8 [0x8])) [0 S4 A32])
(const_int 64 [0x40])) "pr86334.c":7 86 {*movsi_internal}
(nil))
(insn 16 15 17 2 (set (mem:SI (plus:SI (reg/f:SI 7 sp)
(const_int 4 [0x4])) [0 S4 A32])
(reg/f:SI 108)) "pr86334.c":7 86 {*movsi_internal}
(expr_list:REG_DEAD (reg/f:SI 108)
(nil)))
(insn 17 16 18 2 (set (mem:SI (reg/f:SI 7 sp) [0 S4 A32])
(reg/f:SI 107)) "pr86334.c":7 86 {*movsi_internal}
(expr_list:REG_DEAD (reg/f:SI 107)
(nil)))
(call_insn 18 17 21 2 (set (reg:SI 0 ax)
(call (mem:QI (symbol_ref:SI ("memcpy") [flags 0x41] <function_decl
0x7fda6695c100 __builtin_memcpy>) [0 __builtin_memcpy S1 A8])
(const_int 12 [0xc]))) "pr86334.c":7 721 {*call_value}
(expr_list:REG_UNUSED (reg:SI 0 ax)
(expr_list:REG_EH_REGION (const_int 0 [0])
(nil)))
(expr_list:SI (use (mem/f:SI (reg/f:SI 7 sp) [0 S4 A32]))
(expr_list:SI (use (mem/f:SI (plus:SI (reg/f:SI 7 sp)
(const_int 4 [0x4])) [0 S4 A32]))
(expr_list:SI (use (mem:SI (plus:SI (reg/f:SI 7 sp)
(const_int 8 [0x8])) [0 S4 A32]))
(nil)))))
Please note that (insn 13) passes this address as source address to memcpy, so
the initialization in (insn 8) and (insn 9) should not be removed. Please also
note that removed two insns write to the same address, the first in BLKmode,
and the second in SImode.
Looks like RTL-optimization problem to me. Adding CC.
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