[Bug tree-optimization/86520] AArch64: Two 8-bit accesses coalesced into a single 16-bit access

rearnsha at gcc dot gnu.org gcc-bugzilla@gcc.gnu.org
Tue Jul 17 08:53:00 GMT 2018


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86520

--- Comment #7 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
(In reply to Stephen Warren from comment #6)
> > Note that library code also assumes that misaligned accesses are safe:
> > that is the default for AArch64.
> 
> I assume you're talking about gcc's default, not any architectural default?
> The ARMv8 ARM states that SCTLR_ELx.A doesn't have an architecturally
> defined reset value (i.e. default).
> 
Yes.  The architecture requires that it be possible to enable unaligned access
and on almost all implementations doing unaligned accesses will never be slower
than multiple aligned accesses and will normally be much faster.  So less code
and more performance.

It does presume that the MMU has been turned on, but on a 64-bit core that's
pretty much a given: only startup code would ever need to handle the MMU
disabled state.

> (Sorry if this shows up twice; I typed it this morning and thought I
> submitted it, but it hasn't shown up).

It didn't.


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