[Bug middle-end/84071] [7/8 regression] wrong elimination of zero-extension after sign-extended load

[ebotcazou at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84071

--- Comment #10 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
> The addition is performed on the full 32-bit register, so this obviously
> means that the top 24 bits have an undefined value.

Not if the entire registers have a defined value before the addition.  The
point of WORD_REGISTER_OPERATIONS is the following: you have a pair of SImode
registers with known values and you do a QImode addition on them.  If the macro
is defined, then the compiler considers that the result has a defined value in
SImode.

In any case, that's not really the issue here and I'll just fix the combiner.