[Bug target/81550] [8 regression] gcc.target/powerpc/loop_align.c fails starting with r250482

[meissner at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81550

--- Comment #3 from Michael Meissner <meissner at gcc dot gnu.org> ---
It isn't actually subversion id 250482 that causes the problem.  I've built
250481 and 250483 compilers and there is no difference in code.  I had 252844,
and it shows the problem.

The difference between the two is 250481 generates code that allows PRE_INC,
PRE_DEC, and PRE_MODIFY on DFmode values for power7.

Now, in theory it should not allow PRE_* on DFmode, since power7 supports
DFmode in both traditional FPR registers and altivec registers.  The
traditional FPR loads and store support PRE_* forms of the instruction, but the
VSX loads used for the Altivec registers don't support PRE_* (the original form
of the instructions supported it, but it was removed the hardware shipped).

The debug code (-mdebug=reg) shows that in theory the PRE_* support was turned
off, but somewhere it getting turned back on and the lfdu is generated.

If you compile the code with -mno-update, it generates the same code.