[Bug target/83399] Power8 ICE During LRA with 2-op rtl pattern for lvx instruction
bergner at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Mon Jan 8 17:46:00 GMT 2018
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83399
--- Comment #6 from Peter Bergner <bergner at gcc dot gnu.org> ---
A better test case which "looks" valid to me and still ICEs with -O1
-mabi=elfv2 -S (on LE):
typedef __attribute__((altivec(vector__))) int v4si_t;
int
foo (void)
{
v4si_t a, u, v, y;
u = __builtin_altivec_lvx (32, ((void *) &a) - 32);
v = __builtin_altivec_lvx (64, ((void *) &a) - 32);
y = u + v;
return y[0];
}
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