[Bug rtl-optimization/83565] [7/8 regression] RTL combine pass breaks shift result (at least on ia64)

[ebotcazou at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83565

--- Comment #31 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
> So it appears that we have 2 classes of RISC machines, the ones supporting a
> strong version of WORD_REGISTER_OPERATIONS and the others only a weak one.

However I'm not sure whether exposing the distinction is really the way to go
so I'm going to evaluate the pessimization that would be introduced on SPARC
64-bit by disregarding WORD_REGISTER_OPERATIONS for shift operations.