[Bug target/81228] [7 Regression] ICE in gen_vec_cmpv2dfv2di, at config/aarch64/aarch64-simd.md:2508

[sudi at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81228

--- Comment #10 from sudi at gcc dot gnu.org ---
Author: sudi
Date: Thu Feb 22 15:01:05 2018
New Revision: 257901

URL: https://gcc.gnu.org/viewcvs?rev=257901&root=gcc&view=rev
Log:
Adding the missing LTGT to plug the ICE in PR81228.
This is a backport of r255625 of trunk.

*** gcc/ChangeLog ***

2018-02-22  Sudakshina Das  <sudi.das@arm.com>
            Bin Cheng  <bin.cheng@arm.com>

        Backport from mainline:
        2017-12-14  Sudakshina Das  <sudi.das@arm.com>
                    Bin Cheng  <bin.cheng@arm.com>

        PR target/81228
        * config/aarch64/aarch64.c (aarch64_select_cc_mode): Move LTGT to
        CCFPEmode.
        * config/aarch64/aarch64-simd.md (vec_cmp<mode><v_cmp_result>): Add
        LTGT.

*** gcc/testsuite/ChangeLog ***

2017-02-22  Sudakshina Das  <sudi.das@arm.com>

        Backport from mainline:
        2017-12-14  Sudakshina Das  <sudi.das@arm.com>

        PR target/81228
        * gcc.dg/pr81228.c: New.

Added:
    branches/gcc-7-branch/gcc/testsuite/gcc.dg/pr81228.c
Modified:
    branches/gcc-7-branch/gcc/ChangeLog
    branches/gcc-7-branch/gcc/config/aarch64/aarch64-simd.md
    branches/gcc-7-branch/gcc/config/aarch64/aarch64.c
    branches/gcc-7-branch/gcc/testsuite/ChangeLog