[Bug target/59833] ARM soft-float extendsfdf2 fails to quiet signaling NaN

joseph at codesourcery dot com gcc-bugzilla@gcc.gnu.org
Fri Feb 16 22:24:00 GMT 2018


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59833

--- Comment #16 from joseph at codesourcery dot com <joseph at codesourcery dot com> ---
On Fri, 16 Feb 2018, egallager at gcc dot gnu.org wrote:

> > powerpc failure of floating-point extensions to quiet signaling NaNs 
> > (because loads implicitly extend from float to double in a way that's 
> > defined as bit-manipulation rather than a convertFormat operation) is bug 
> > 56828.
> 
> but bug 56828 was closed as INVALID...

Maybe the test in that bug in fact only covered cases involving long 
double (which is what that closure was for).  There is an issue with 
conversion from float to double on powerpc (FPRs always store values in 
double format, and a load of a float value is a bitwise operation that 
never raises exceptions but produces a double sNaN when loading a float 
sNaN - which can be stored back to float in memory as a float sNaN with no 
exceptions - meaning that converting a float value in registers to double 
is treated as a no-op).  It's normally OK to do that, if the converted 
value will be used in double arithmetic - but if it's stored back to 
memory as a double without having gone through arithmetic other than abs / 
negate / copysign, it will incorrectly remain a double sNaN, and in that 
case, given -fsignaling-nans, something should be done to convert it 
explicitly to a qNaN (e.g. use an frsp instruction, which would do nothing 
to a value representable as float which is not a signaling NaN).


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