[Bug target/88541] VPCLMULQDQ 256-bit inline function unavailable with optimization but without enabled AVX512VL support

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88541

--- Comment #6 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Because AVX was what is in i386-builtins.def already and as the testcase shows,
it works with just -mavx.  You can not just load/store those vectors, you can
also do logical operations on them etc. (through the floating point vector
ops).
With GFNI I believe the point was that the corresponding mode wasn't allowed in
the registers without SSE2, so you'd get ICEs.