[Bug middle-end/86968] Unaligned big-endian (scalar_storage_order) access on armv7-a yields 4 ldrb instructions rather than ldr+rev

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86968

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
            Summary|Unaligned big-endian access |Unaligned big-endian
                   |on armv7-a yields 4 ldrb    |(scalar_storage_order)
                   |instructions rather than    |access on armv7-a yields 4
                   |ldr+rev                     |ldrb instructions rather
                   |                            |than ldr+rev

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
One comment about scalar_storage_order, it is not lowered until RTL time so it
never gets optimized by the tree level.  I found scalar_storage_order almost
never to be very optimial at being optimized.