[Bug rtl-optimization/85160] GCC generates mvn/and instructions instead of bic on aarch64

[segher at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85160

Segher Boessenkool <segher at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |ASSIGNED
           Assignee|unassigned at gcc dot gnu.org      |segher at gcc dot gnu.org

--- Comment #3 from Segher Boessenkool <segher at gcc dot gnu.org> ---
I have some combine patches (for GCC 9) to do more 2->2 combinations.  Still
needs more tuning (but it fixes this testcase).