[Bug target/83402] PPC64 implementation of ./rs6000/emmintrin.h gives out of range for _mm_slli_epi32

[pc at us dot ibm.com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83402

--- Comment #6 from Paul Clarke <pc at us dot ibm.com> ---
(In reply to Steven Munroe from comment #5)
> You need to look at the generated asm code. And see what the compiler is
> doing.
> 
> Basically it should be generating a vspltisw vr,si for vec_splat_s32.
> 
> But if the immediate signed int (si) is greater than 15, should failure with:
> 
> error: argument 1 must be a 5-bit signed literal

I was hoping you'd tell me the scenario with which you saw that error.  :-)

> The vec_splats should work for any value as it will load a const vector from
> storage.
> 
> Perhaps the compiler is generating bad code and not reporting it.
> 
> Or the compiler is too smart and converting the vec_splat_s32 to the more
> general vec_splats under the covers.

I think the compiler is doing this.  Here's an extract from a (new) simple test
case:
--
        out(a);
        a = _mm_slli_epi32( a, 7 );
        out(a);
        a = _mm_slli_epi32( a, 31 );
        out(a);
--
     li      r0,32
     stvx    v31,r1,r0
     bl      10000628 <out+0x8>
     addis   r9,r2,-2
     vspltisw v0,7
     addi    r9,r9,-30976
     lvx     v31,0,r9
     vslw    v31,v31,v0
     xxlor   vs34,vs63,vs63
     bl      10000628 <out+0x8>
     addis   r9,r2,-2
     addi    r9,r9,-30960
     lvx     v2,0,r9
     vslw    v2,v31,v2
     bl      10000628 <out+0x8>
--
So, if the shift value is < 16, it uses vspltisw.
If the shift value is >= 16, it loads a const vector from memory.

Is this issue now moot?