[Bug rtl-optimization/80481] Unoptimal additional copy instructions

[andrew.n.senkevich at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80481

--- Comment #1 from Andrew Senkevich <andrew.n.senkevich at gmail dot com> ---
Reload phase adds insn 1817 (1)

(insn 856 855 1817 136 (set (reg:V16SI 22 xmm1 [orig:985 vect__72.36 ] [985])
        (unspec:V16SI [
                (mem:V16SI (plus:DI (reg/f:DI 39 r10 [orig:206 vectp.34 ]
[206])
                        (reg:DI 2 cx [982])) [4 MEM[base: vectp.34_259, index:
_972, offset: 0B]+0 S64 A32])
                (reg:V16SI 47 xmm10 [1041])
            ] UNSPEC_VPERMVAR)) "./test-first.c":60 4157 {avx512f_permvarv16si}
     (nil))
(insn 1817 856 857 136 (set (reg:V16SF 23 xmm2 [orig:985 vect__72.36 ] [985])  
                                        (1)
        (reg:V16SF 22 xmm1 [orig:985 vect__72.36 ] [985])) "./test-first.c":61
1237 {movv16sf_internal}
     (nil))
(insn 857 1817 858 136 (set (reg:V16SF 23 xmm2 [orig:985 vect__72.36 ] [985])
        (fma:V16SF (neg:V16SF (reg:V16SF 23 xmm2 [orig:985 vect__72.36 ]
[985]))
            (mem:V16SF (plus:DI (reg/f:DI 37 r8 [orig:201 vectp.38 ] [201])
                    (reg:DI 1 dx [orig:557 ivtmp.110 ] [557])) [4 MEM[base:
vectp.38_249, index: ivtmp.110_977, offset: 0B]+0 S64 A512])
            (reg:V16SF 28 xmm7 [orig:1034 vect_cst__243 ] [1034])))
"./test-first.c":61 1928 {*fma_fnmadd_v16sf}
     (nil))

and it lives until the end:

#(insn:TI 856 851 1817 75 (set (reg:V16SI 22 xmm1 [orig:985 vect__72.36 ]
[985])
#        (unspec:V16SI [
#                (mem:V16SI (plus:DI (reg/f:DI 39 r10 [orig:206 vectp.34 ]
[206])
#                        (reg:DI 2 cx [982])) [4 MEM[base: vectp.34_259, index:
_972, offset: 0B]+0 S64 A32])
#                (reg:V16SI 47 xmm10 [1041])
#            ] UNSPEC_VPERMVAR)) "./test-first.c":60 4157
{avx512f_permvarv16si}
#     (expr_list:REG_DEAD (reg:DI 2 cx [982])
#        (nil)))
        vpermd  (%r10,%rcx), %zmm10, %zmm1      # 856   avx512f_permvarv16si   
[length = 7]
#(insn:TI 1817 856 857 75 (set (reg:V16SF 23 xmm2 [orig:985 vect__72.36 ]
[985])
#        (reg:V16SF 22 xmm1 [orig:985 vect__72.36 ] [985])) "./test-first.c":61
1237 {movv16sf_internal}
#     (expr_list:REG_DEAD (reg:V16SF 22 xmm1 [orig:985 vect__72.36 ] [985])
#        (nil)))
        vmovaps %zmm1, %zmm2    # 1817  movv16sf_internal/3     [length = 6]   
                                    (1)
#(insn 857 1817 860 75 (set (reg:V16SF 23 xmm2 [orig:985 vect__72.36 ] [985])
#        (fma:V16SF (neg:V16SF (reg:V16SF 23 xmm2 [orig:985 vect__72.36 ]
[985]))
#            (mem:V16SF (plus:DI (reg/f:DI 37 r8 [orig:201 vectp.38 ] [201])
#                    (reg:DI 1 dx [orig:557 ivtmp.110 ] [557])) [4 MEM[base:
vectp.38_249, index: ivtmp.110_977, offset: 0B]+0 S64 A512])
#            (reg:V16SF 28 xmm7 [orig:1034 vect_cst__243 ] [1034])))
"./test-first.c":61 1928 {*fma_fnmadd_v16sf}
#     (nil))
        vfnmadd132ps    (%r8,%rdx), %zmm7, %zmm2        # 857  
*fma_fnmadd_v16sf/1     [length = 7]