[Bug target/82106] [RISCV] Misaligned loads generated when doubles are split between stack and registers

palmer at dabbelt dot com gcc-bugzilla@gcc.gnu.org
Tue Sep 5 18:36:00 GMT 2017


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82106

--- Comment #4 from Palmer Dabbelt <palmer at dabbelt dot com> ---
Ya, sorry, I misread the assembly.


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