[Bug target/80160] New: [7 regression] operand has impossible constraints
arnd at linaro dot org
gcc-bugzilla@gcc.gnu.org
Thu Mar 23 13:47:00 GMT 2017
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80160
Bug ID: 80160
Summary: [7 regression] operand has impossible constraints
Product: gcc
Version: 7.0.1
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: arnd at linaro dot org
Target Milestone: ---
Created attachment 41033
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=41033&action=edit
linux/arch/x86/mm/pageattr.c preprocessed and compressed
I ran into this one at the same time as pr80148, with almost the same symptom
but apparently a different root cause, as this one only shows up with very
recent gcc snapshots. Right now this shows up in two files in the kernel using
the set_64bit helper, this is one of them:
x86_64-linux-gcc-7.0.1 pageattr.i -O2 -Wall -Wno-pointer-sign -Wno-sign-compare
-Wno-unused -fno-strict-aliasing -fno-omit-frame-pointer -march=pentium-mmx
-m32
In file included from /git/arm-soc/arch/x86/include/asm/cmpxchg.h:142:0,
from /git/arm-soc/arch/x86/include/asm/atomic.h:7,
from /git/arm-soc/arch/x86/include/asm/msr.h:66,
from /git/arm-soc/arch/x86/include/asm/processor.h:20,
from /git/arm-soc/arch/x86/include/asm/cpufeature.h:4,
from /git/arm-soc/arch/x86/include/asm/thread_info.h:52,
from /git/arm-soc/include/linux/thread_info.h:25,
from /git/arm-soc/arch/x86/include/asm/preempt.h:6,
from /git/arm-soc/include/linux/preempt.h:80,
from /git/arm-soc/include/linux/spinlock.h:50,
from /git/arm-soc/include/linux/wait.h:8,
from /git/arm-soc/include/linux/fs.h:5,
from /git/arm-soc/include/linux/highmem.h:4,
from /git/arm-soc/arch/x86/mm/pageattr.c:5:
/git/arm-soc/arch/x86/mm/pageattr.c: In function '__change_page_attr_set_clr':
/git/arm-soc/arch/x86/include/asm/cmpxchg_32.h:29:2: error: 'asm' operand has
impossible constraints
asm volatile("\n1:\t"
^~~
The inline assembly in question is defined as
static inline void set_64bit(volatile u64 *ptr, u64 value)
{
u32 low = value;
u32 high = value >> 32;
u64 prev = *ptr;
asm volatile("\n1:\t"
LOCK_PREFIX "cmpxchg8b %0\n\t"
"jnz 1b"
: "=m" (*ptr), "+A" (prev)
: "b" (low), "c" (high)
: "memory");
}
static inline __attribute__((always_inline, unused))
__attribute__((no_instrument_function)) void native_set_pte_atomic(pte_t *ptep,
pte_t pte)
{
set_64bit((unsigned long long *)(ptep), native_pte_val(pte));
}
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