[Bug target/80082] [5/6/7 regression] GCC incorrectly assumes Cortex-r[578] have 64-bit single-copy atomic LDRD

[thopre01 at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80082

--- Comment #7 from Thomas Preud'homme <thopre01 at gcc dot gnu.org> ---
Author: thopre01
Date: Wed Mar 22 11:35:15 2017
New Revision: 246365

URL: https://gcc.gnu.org/viewcvs?rev=246365&root=gcc&view=rev
Log:
Fix PR80082: LDRD erronously used for 64bit load on ARMv7-R

2017-03-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    PR target/80082
    * config/arm/arm-isa.h (isa_bit_lpae): New feature bit.
    (ISA_ARMv7ve): Add isa_bit_lpae to the definition.
    * config/arm/arm-protos.h (arm_arch7ve): Rename into ...
    (arm_arch_lpae): This.
    * config/arm/arm.c (arm_arch7ve): Rename into ...
    (arm_arch_lpae): This.  Define it in term of isa_bit_lpae.
    * config/arm/arm.h (TARGET_HAVE_LPAE): Redefine in term of
    arm_arch_lpae.

    gcc/testsuite/
    PR target/80082
    * gcc.target/arm/atomic_loaddi_10.c: New testcase.
    * gcc.target/arm/atomic_loaddi_11.c: Likewise.

Added:
    trunk/gcc/testsuite/gcc.target/arm/atomic_loaddi_10.c
    trunk/gcc/testsuite/gcc.target/arm/atomic_loaddi_11.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/arm/arm-isa.h
    trunk/gcc/config/arm/arm-protos.h
    trunk/gcc/config/arm/arm.c
    trunk/gcc/config/arm/arm.h
    trunk/gcc/testsuite/ChangeLog