[Bug middle-end/79665] gcc's signed (x*x)/200 is slower than clang's

[wilco at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79665

--- Comment #19 from Wilco <wilco at gcc dot gnu.org> ---
Author: wilco
Date: Wed Jun 28 14:13:02 2017
New Revision: 249740

URL: https://gcc.gnu.org/viewcvs?rev=249740&root=gcc&view=rev
Log:
Improve Cortex-A53 shift bypass

The aarch_forward_to_shift_is_not_shifted_reg bypass always returns true
on AArch64 shifted instructions.  This causes the bypass to activate in
too many cases, resulting in slower execution on Cortex-A53 like reported
in PR79665.

This patch uses the arm_no_early_alu_shift_dep condition instead which
improves the example in PR79665 by ~7%.  Given it is no longer used,
remove aarch_forward_to_shift_is_not_shifted_reg.  Also remove an
unnecessary REG_P check.

    gcc/
        PR target/79665
        * config/arm/aarch-common.c (arm_no_early_alu_shift_dep):
        Remove redundant if.
        (aarch_forward_to_shift_is_not_shifted_reg): Remove.
        * config/arm/aarch-common-protos.h
        (aarch_forward_to_shift_is_not_shifted_re): Remove.
        * config/arm/cortex-a53.md: Use arm_no_early_alu_shift_dep in bypass.

Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/arm/aarch-common-protos.h
    trunk/gcc/config/arm/aarch-common.c
    trunk/gcc/config/arm/cortex-a53.md