[Bug target/79277] New: lies about alignment of DFmode

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79277

            Bug ID: 79277
           Summary: lies about alignment of DFmode
           Product: gcc
           Version: 7.0
            Status: UNCONFIRMED
          Keywords: wrong-code
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: rguenth at gcc dot gnu.org
  Target Milestone: ---
            Target: i?86-*-*

Currently i?86 says DFmode is 8 byte aligned but that's not true, it is only
guaranteed 4 byte aligned.  This results in

 *(double *)p;

having 8 byte aligment according to get_object_alignment and RTL expansion:

(insn 6 5 7 (set (reg:DF 90)
        (mem:DF (reg/v/f:SI 88 [ p ]) [1 *p_2(D)+0 S8 A64])) "t.c":16 -1
     (nil))

There is only ADJUST_FIELD_ALIGN ensuring proper alignment of FIELD_DECLs
inside structs (plus the min_align_of_type expensive hack done for UBSAN).

With some trivial cleanup in vectorizer code this leads to miscompilations
(because of get_object_alignment returning the "wrong" value).

Proposed (incomplete) patch for the target:

Index: gcc/config/i386/i386-modes.def
===================================================================
--- gcc/config/i386/i386-modes.def      (revision 245021)
+++ gcc/config/i386/i386-modes.def      (working copy)
@@ -33,6 +33,7 @@ ADJUST_FLOAT_FORMAT (XF, (TARGET_128BIT_
                          : &ieee_extended_intel_96_format));
 ADJUST_BYTESIZE  (XF, TARGET_128BIT_LONG_DOUBLE ? 16 : 12);
 ADJUST_ALIGNMENT (XF, TARGET_128BIT_LONG_DOUBLE ? 16 : 4);
+ADJUST_ALIGNMENT (DF, !TARGET_64BIT ? 4 : 8);

 /* Add any extra modes needed to represent the condition code.