[Bug rtl-optimization/79660] New: [7 regression] Arm register allocation failure with thumb1 building libgcc

rearnsha at gcc dot gnu.org gcc-bugzilla@gcc.gnu.org
Tue Feb 21 10:56:00 GMT 2017


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79660

            Bug ID: 79660
           Summary: [7 regression] Arm register allocation failure with
                    thumb1 building libgcc
           Product: gcc
           Version: 7.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: rearnsha at gcc dot gnu.org
                CC: vmakarov at gcc dot gnu.org
  Target Milestone: ---
            Target: arm

Created attachment 40799
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=40799&action=edit
testcase

New failure in register allocation.

Compiler configured for arm-none-eabi (default CPU = arm7tdmi).

/work/rearnsha/scratch/gnu/gcc/arm/trunk/./gcc/cc1  -quiet -mthumb   -g -O2  
-fbuilding-libgcc -fno-stack-protector -fno-inline ice.i -mcpu=arm7tdmi

ice.i:31:1: error: unable to find a register to spill
 }
 ^
ice.i:31:1: error: this is the insn:
(insn 136 145 137 2 (set (reg:SI 159)
        (neg:SI (ltu:SI (subreg:SI (reg:DI 163 [orig:111 _2 ] [111]) 4)
                (subreg:SI (reg/v:DI 124 [ temp1 ]) 4)))) "ice.i":21 849
{cstoresi_nltu_thumb1}
     (expr_list:REG_DEAD (reg:DI 163 [orig:111 _2 ] [111])
        (nil)))
ice.i:31: confused by earlier errors, bailing out


More information about the Gcc-bugs mailing list