[Bug target/79568] ICE in extract_insn, at recog.c:2311 for pr70325.c (with -mavx512bw)

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79568

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |ASSIGNED
   Last reconfirmed|                            |2017-02-17
           Assignee|unassigned at gcc dot gnu.org      |jakub at gcc dot gnu.org
     Ever confirmed|0                           |1

--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Created attachment 40761
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=40761&action=edit
gcc7-pr79568.patch

Untested fix.

The issue is as the comment in def_builtin says, OPTION_MASK_ISA_AVX512VL and
OPTION_MASK_ISA_64BIT behave specially in the builtin mask bitmask, while for
others (not 100% sure) oring two isa bits together means enable on either this
or that, for avx512vl and/or m64 in the bitmask it means honor these and any of
the other bits.  The full list of builtin masks with more than one bit is:
OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VL
OPTION_MASK_ISA_AVX512CD | OPTION_MASK_ISA_AVX512VL
OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512VL
OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_64BIT
OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512VL
OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512VL
OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512CD
OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_64BIT
OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_64BIT
OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4
OPTION_MASK_ISA_FSGSBASE | OPTION_MASK_ISA_64BIT
OPTION_MASK_ISA_FXSR | OPTION_MASK_ISA_64BIT
OPTION_MASK_ISA_LWP | OPTION_MASK_ISA_64BIT
OPTION_MASK_ISA_LZCNT | OPTION_MASK_ISA_64BIT
OPTION_MASK_ISA_SSE2 | OPTION_MASK_ISA_64BIT
OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32
OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32 | OPTION_MASK_ISA_64BIT
OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_64BIT
OPTION_MASK_ISA_TBM | OPTION_MASK_ISA_64BIT
OPTION_MASK_ISA_XSAVEC | OPTION_MASK_ISA_64BIT
OPTION_MASK_ISA_XSAVE | OPTION_MASK_ISA_64BIT
OPTION_MASK_ISA_XSAVEOPT | OPTION_MASK_ISA_64BIT
OPTION_MASK_ISA_XSAVES | OPTION_MASK_ISA_64BIT
out of these, only
OPTION_MASK_ISA_FMA | OPTION_MASK_ISA_FMA4
OPTION_MASK_ISA_SSE4_2 | OPTION_MASK_ISA_CRC32
OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A
are ones if I filter out the 2 special bits.  I believe at least the last one
really is supposed to be either -msse or -m3dnowa, no idea about the other two.